Industry Outlook is a regular Data Center Journal Q&A series that presents expert views on market trends, technologies and other issues relevant to data centers and IT.
This week, Industry Outlook asks Yaniv Kopelman, Networking CTO for the Networking Business Group at Marvell Semiconductor, about the networking challenges that data centers will face in coming years. Yaniv rejoined the company in June 2015 after serving a 12-year tenure from 1996 to 2008. In his position, Yaniv is responsible for defining the company’s cloud, campus and carrier-network-infrastructure ASICs roadmap as well as for researching new technologies for all Networking Group products. He joined Marvell from Qualcomm, where he held positions as senior product manager and principal architect. Previously, Yaniv was director of system architecture at PMC-Sierra. Before that, he held various positions at Marvell, including chief architect for the carrier and metro ASICs product line and, subsequently, principal architect, leading the company’s switch-architecture group. Yaniv received a Bachelor of Science in electrical engineering and an MBA from Technion - Israel Institute of Technology. He holds multiple patents in the fields of networking, ASIC design and lookup algorithms.
Industry Outlook: What will be the main challenges for networking deployment in the data center over the next few years?
Yaniv Kopelman: The data center industry will face many challenges over the next few years. But one of the most significant will be the industry’s reticence to move away from the “one-size-fits-all” approach when it comes to semiconductor development. At present, two schools of thought dominate the landscape: homogeneous versus heterogeneous—or modular.
The first (and current) school of thought is for everyone to use the same configuration in the data center when it comes to ports, power and capacity. The issue, however, is that the semiconductor components designed to support the data center are evolving at different rates. Furthermore, the data center speeds that the semiconductor components are required to support increase each year beyond the one-size-fits-all approach, meaning chips are fast outdated and are slowing down Moore’s Law.
The second school of thought, however, promotes the idea of optimizing everything in the data center using different configurations when it comes to the ports, power and capacity.
For example, today, when it comes to semiconductor development for the data center, there is a desire to align input and output with the core logic capability—also called packet processing. But the issue is that the two architectures have been innovating at different paces and are out of sync. As such, when building a device that involves interlocking these two elements, the device will only operate at the speed of the least-evolved element.
Marvell believes a modular approach is required to solve this issue, which involves decoupling the input/output (I/O) and packet-processing architectures, allowing them to evolve at their own pace.
This shift from a homogeneous to heterogeneous design must be led at the chip level. At present, many semiconductor developers are forcing data centers to take the homogeneous approach by only providing one chip for use across the board, instead of a modular design that would allow I/O technology to operate independently of packet processing and reach its full potential.
IO: How is the semiconductor industry evolving to meet these new networking demands?
YK: The harsh truth is that the semiconductor industry isn’t evolving to meet industry needs. Ten to fifteen years ago, it was easy to design a chip that could be diversified and differentiated. Over the last 5–7 years, however, making chips has become harder and much more expensive because of the cost associated with deep sub-nanometer geometries—the so-called decline of Moore’s Law. As a result, semiconductor suppliers have reduced the number of options they’re able to deliver to market from four or five to just one.
Taking a modular approach to semiconductor development and allowing the I/O to be decoupled from the packet-processing function would solve many of these pain points. Instead of building just one big chip with a single use case and power capability in mind, semiconductor companies could use these decoupled building blocks to offer four or five different configurations, giving data center companies greater diversity and choice, as well as to address the decline of Moore’s Law.
IO: Does the end of Moore's Law (whether it’s soon or already here) mean there will be slower progress in developing network technologies, or does it create new opportunities?
YK: If you follow the current design ethos, Moore’s Law will slowly come to an end as semiconductor development becomes more complex and harder to improve on. If companies insist on following Moore’s Law, the design process will also slow down.
Businesses that harness innovation, however, and adopt the modular building-block approach will have far more success. By innovating at the packet level instead of just the silicon level, semiconductor companies will be able to deliver more-diverse devices in a much shorter time period, satisfying Moore’s Law and adapting to customer requirements.
IO: Will progress in networking be mostly in software, mostly in hardware, or a fairly even mix of both?
YK: I see progress being made in the areas of software, hardware and power optimization throughout the network. As we progress, though, I see the network playing a simpler role, so the software required for the network will also become simpler. Hardware, on the other hand, is where the real advances will take place, as it asserts its role as the brains of the network, dealing more with issues concerning power, speeds, feeds and routing.
Ultimately, the network will become akin to a sensor with lots of mini-sensors throughout, all reporting status and data flow to more-powerful control centers and computers monitoring network status and giving commands, based at the edge. As a result, purely embedded networking software will become less meaningful.
IO: What trends do you see as a result of high-bandwidth demand continuing to grow in the data center?
YK: As I noted above, the important trend will be a shift towards a modular approach to semiconductor development, decoupling the input/output architecture from packet processing—and no longer the one-size-fits-all homogeneous approach that currently exists.
IO: How do companies such as Marvell plan to address these evolving data center needs—both from performance and cost perspectives?
YK: Marvell takes a uniquely modular approach to semiconductor development, separating the input/output from the packet-processing architecture and allowing each to evolve unhindered by the other. This approach gives customers a greater choice of more-efficient and more-cost-effective semiconductors, taking a building-block approach and helping stave off the death of Moore’s Law.
IO: Looking forward, what are the main technologies that will drive next-generation data centers and what are likely to be their time frames?
YK: Next-generation data centers will be less about the technology and more about the ideology employed in developing the semiconductor chips that drive them.
The semiconductor industry needs to take a modular approach to innovation and focus on innovative ways to integrate the building blocks with each other. In layman’s terms, although the modular approach will allow faster innovation, the focus will need to be on the stitching between the building blocks, which must be water tight to avoid integration issues.