IBM Pushes Nanotechnology Frontiers

December 8, 2011 3 Comments »
IBM Pushes Nanotechnology Frontiers

Thanks to the finite speed of light, which places a fundamental minimum on the time it takes an electrical signal to travel a specified distance, improvements in computer processor technology require devices to become smaller and smaller. But as individual components (for instance, transistors) approach the size of the atoms that compose them, progress becomes increasingly difficult. In what may be achievements that help keep Moore’s Law alive, however, IBM has announced new developments in several nanotechnology pursuits that could keep the miniaturization train moving forward a little longer.

At this year’s IEEE International Electron Devices Meeting earlier this month, IBM introduced three prototype devices applying the company’s research in racetrack memory, graphene and carbon nanotubes. IBM’s motivation for these pursuits arise, in part at least, from the growing difficulty of gaining increased device performance through “simple” shrinks of silicon manufacturing process technologies. For years, scaling down processors was sufficient to increase performance, decrease power consumption and (of course) reduce size. But ultimately, this driver for Moore’s Law will run out of steam when device sizes reach (somewhere near) the size of the atoms that constitute them.

“For more than 50 years, computer processors have increased in power and shrunk in size at a tremendous rate. However, today’s chip designers are hitting physical limitations with Moore’s Law, halting the pace of product innovation from scaling alone,” said the company in a press release earlier this week (“Made in IBM Labs: Researchers Demonstrate Future of Computing with Graphene, Racetrack and Carbon Nanotube Breakthroughs”).

Other companies have illustrated the growing need to look beyond just making transistors smaller; Intel, for instance, announced earlier this year its new FinFET technology (“Intel Increases Transistor Speed by Building Upward”), which uses three-dimensional structures to pack more transistors into less space on a chip. Although Intel’s approach is beneficial and even somewhat novel, it is not necessarily a conceptual breakthrough (in the sense that it is still a matter of packing more semiconductor-based transistors into less area). Ultimately, keeping Moore’s Law alive will require more-revolutionary technologies.

IBM is trying to fit this bill by demonstrating working prototypes of its technologies. The company notes, “With virtually all electronic equipment today built on complementary-symmetry metal–oxide–semiconductor (CMOS) technology, there is an urgent need for new materials and circuit architecture designs compatible with this engineering process as the technology industry nears physical scalability limits of the silicon transistor.” One of the critical successes of the company’s latest developments is their successful integration on 200mm wafers, opening the door to larger scale use in conjunction with existing semiconductor devices.


Graphene, a polycyclic structure built exclusively of carbon atoms (note the similarity to the name of the more commonly known material graphite), has been touted as a “miracle material” owing to its remarkable features: it is extremely strong and highly conductive, and graphene sheets are just one carbon atom thick. A BBC report on the material (“Is graphene a miracle material?”) identifies graphene as the strongest and most conductive substance known to man, having a range of potential applications that make it the metaphorical “plastic” of the 21st century.

IBM, following on the heels of MIT’s creation of a graphene frequency multiplier (“Graphene works as a frequency multiplier”), has integrated a CMOS-compatible version of this device on a 200mm wafer. (A frequency multiplier is a device that outputs a signal whose frequency is an integral multiple of the input signal’s frequency.) According to the company, the device operates at up to 5GHz and promises stability in adverse conditions, such as high-temperature and high-radiation environments. IBM stated that its prototype device is stable up to 200 degrees Celsius. “Instead of trying to deposit gate dielectric on an inert graphene surface, the researchers developed a novel embedded gate structure that enables high device yield on a 200mm wafer,” said the company in its press release. The new development—if commercially and technically feasible in advanced components—could enable higher-frequency devices and more-powerful communications systems.

Racetrack Memory

In another step forward, IBM has taken its racetrack memory concept—which the company first developed in 2002—and applied it to CMOS devices on 200mm wafers. So-called racetrack memory uses nanowires to hold “strings” of data. According to an IBM article (“Racetrack Memory”), the concepts originator, Stuart Parkin, “conceived of a device consisting of a city of skyscrapers—each one only hundreds of atoms wide—of magnetic material, with each floor of each skyscraper containing a single bit of data. The data is shot up and down the skyscrapers—almost like a supersonic elevator—by using special currents of electrons. . . These currents are generated by a transistor connected to the bottom of each skyscraper.”

This design allows a transistor to store many bits of data rather than just one, greatly expanding the potential capacity of memory devices. IBM’s recent prototype is able to perform both read and write functions and consists of 256 planar racetracks. The company believes this breakthrough will enable further progress through creation of three-dimensional racetrack structures that increase density and reliability. Racetrack memory’s unique characteristics result from its combination of the advantages of both magnetic hard drives and solid-state memory devices, and with further development, it offers the potential of ameliorating the growing concern over data storage.

Carbon Nanotubes

IBM’s third announced prototype uses carbon nanotubes to implement a transistor with channel lengths below 10nm. Carbon nanotubes are closely related to graphene—they are essentially the cylindrical analog of graphene sheets, being composed of conjoined hexagonal rings of carbon atoms. Nanotubes are like tiny wires, and they can be manipulated (using, for instance, an atomic force microscope) to adjust both their shape and behavior.

Although they are extremely strong, like graphene, carbon nanotubes vary in their electrical properties, ranging from semiconductor-like materials to metal-like materials. The company believes that components similar to its prototype will meet the need for “transistors with a channel length below 10 nm, a length scale at which conventional silicon technology will have extreme difficulty performing even with new advanced device architectures.”

How Far Can These Technologies Go?

Periodically, the Data Center Journal reports on new technologies that may be the foundation of future breakthroughs that affect the data center and IT as a whole. The potential of new research and prototypes, like those of IBM discussed above, can be exciting, but some perspective is always needed. For one reason or another, many innovations fall by the wayside, whether for economic, technical or practical reasons. Even the coolest technology, if it can’t be commercialized, will probably fall into the dustbin of history. Part of the excitement of following research progress, however, is seeing which unique concepts are able to move from “gee, that’s a neat idea” to “wow, everybody is using this now.”

So, will IBM’s latest prototypes be the foundation of a new breed of technologies that revolutionize the computing world? The safe bet is “no” (going simply by the odds), but only time will tell. As conventional scaling of process technologies reaches its limit, the need for unique approaches to increasing processor performance will grow. We may even have to wait for Moore’s Law to begin sputtering a bit before technologies such as graphene and nanotubes become feasible. And at such a time, even some forgotten innovations may be given a second look.

Author contact

About Jeff Clark

Jeff Clark is editor for the Data Center Journal. He holds a bachelor’s degree in physics from the University of Richmond, as well as master’s and doctorate degrees in electrical engineering from Virginia Tech. An author and aspiring renaissance man, his interests range from quantum mechanics and processor technology to drawing and philosophy.


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