Industry Perspective: Keeping Pace With Moore’s Law

August 28, 2013 3 Comments »
Industry Perspective: Keeping Pace With Moore’s Law

Industry Perspective is a regular Data Center Journal Q&A series that presents expert views on market trends, technologies and other issues relevant to data centers and IT.

Moore's LawThis week, Industry Perspective asks Dr. Geoff Taylor about the future of Moore’s Law and the efforts underway to stick with its relentless pace of semiconductor development. Geoff is Chief Scientist at POET Technologies and has led development of the Planar Optoelectronic Technology (POET) platform over the past two decades, directing a focused team at the ODIS subsidiary of OPEL. He possesses an extraordinary technical background comprising 30 years of design and development experience in electronic and optical device physics and circuit design, as well as opto-electronic technology, materials and applications. He is concurrently a Professor of Electrical Engineering and Photonics at the University of Connecticut and is responsible for ODIS’s development efforts at the gallium arsenide (GaAs) growth and fabrication facility. With over 150 papers in the world’s most respected journals, along with dozens of patents, Geoff is a leading authority on GaAs solid-state physics, III-V opto-technology, as well as the pioneer in the development of monolithic integrated opto-electronic circuits.

Previously, Geoff served as a Distinguished Member of the technical staff at AT&T Bell Labs, developing inversion-channel technology for III-V materials. At Honeywell and Texas Instruments he helped to develop critical optical technology for the Jupiter Orbital Probe as well as key circuits and devices for very-large-scale-integrated (VLSI) chips. He holds a Ph.D. in Electrical Engineering and an M.A.Sc. in Electrical Engineering from the University of Toronto and a B.Sc. in Electrical Engineering from Queen’s University.

Industry Perspective: How would you summarize Moore’s Law? In particular, does cost and/or transistor density play a role in the way it describes semiconductor progress?

Geoff Taylor: Moore’s Law has dictated the pace of technological change for the last five decades. As the number of transistors doubles approximately every one and a half to two years, this has not only influenced the performance capabilities of computing devices and the functions they make possible, but it has also shaped industry and consumer expectations about performance and efficiency gains for computing devices, at continual lower costs.

Transistor density and its impact on product cost has been the traditional guideline for advancing computer technology because density has been accomplished by device shrinkage translating to performance improvement. Moore’s Law begins to fail when performance improvement translates less and less to device shrinkage, which is occurring now at an increasing rate.

As debates and predictions have raged for a number of years on when Moore’s Law will end, now is the time for a clear alternative and solution to power the next wave of chipset design and innovation.

IP: Even though it’s uncertain as to precisely when Moore’s Law will run out of steam, do you think there’s enough “maneuvering room” to keep it on track for more than, say, a decade or so?

GT: It is POET Technologies’ view that Moore’s Law could come to an end within the next decade, particularly as semiconductor companies have themselves recently highlighted difficulties in moving to the next generation of chipsets, or can only see two to three generations ahead.

On the current path of silicon (Si) CMOS, the performance enhancements expected of the chip industry over the next decade will not be accessible. Without a major technological change, there will be saturation in system performance from the mobile platform across the spectrum to the data center.

Rather than focus on how many more years the industry and consumers can expect Moore’s Law to last, we want to focus on the opportunities for new developments and solutions to continue advancements in computing.

IP: Do you foresee semiconductor manufacturing going below 1nm?

GT: It’s hard to say whether semiconductor manufacturing will go beyond 1nm—and if so, when this will happen. POET Technologies’ platform is a patented semiconductor fabrication process that focuses on combining both electronic and optical elements on one monolithic chip. We believe this approach has significant advantages over today’s solutions in terms of density, reliability and power, while delivering these benefits to semiconductor manufacturers at a lower cost.

So for POET Technologies, we’re focusing less on existing integrated-circuit materials and processes and more on a different track with significant future runway. This way, a new growth cycle begins again to deliver increases in performance at lower cost—and it meets ongoing consumer appetites for faster, smaller and more-efficient computing. POET foresees a paradigm shift away from the relentless advance to a 1nm feature size and more toward technology advancement based on new architectures driven by (a) optical device integration and novel optoelectronic device functions as the basis for new circuit concepts and (b) the emergence of quantum computing as a key enabler in digital design.

IP: What benefits can be garnered from using non-silicon-based materials in semiconductor manufacturing?

GT: Although semiconductor manufacturers have relied on silicon for the last five decades, today a significant amount of R&D has been invested in alternatives to address the limitations of Moore’s Law. These alternatives include the use of different compounds such as indium phosphide (InP), gallium nitride (GaN) and gallium arsenide (GaAs), as well as silicon-germanium (SiGe) and other hybrid manufacturing technologies.

The POET (Planar Opto Electronic Technology) platform, for instance, provides integrated-circuit gallium arsenide devices containing both electronic and optical elements on a single chip.

The differentiators and benefits of a platform like POET include the following:

  • Integrated circuits that provide the complementary logic gate as a replacement for CMOS
  • Integrated circuits that simultaneously integrate the optical transmitters and receivers and represent a quantum step forward in processing power, cost and efficiency compared with today’s traditional integrated circuits
  • Methodology that doesn’t require designers or manufacturers to retool—instead using and being compatible with existing design, software and foundry equipment
  • Unique optoelectronic building blocks to enable improved capabilities including low-jitter optical clocks, optoelectronic PLLs, and all-optical digital receivers and transmitters.

IP: In particular, what are some of the advantages and applications of gallium arsenide?

GT: As previously mentioned, alternatives to silicon-based semiconductors are being developed, yet these solutions are all based on high-cost hybrid manufacturing technologies.

The POET platform, which utilizes gallium arsenide (GaAs), is a flexible one that can be applied to virtually any market, including memory, digital/mobile, sensor/laser and electro-optical, among many others. It is compatible with semiconductor capabilities and manufacturing systems and removes the need for retooling—all while providing lower costs, power savings and increased reliability.

The foremost advantage of GaAs is the ability to realize optical and electrical devices simultaneously. GaAs was the original optical material for the demonstration of the diode laser. It was also the original material for the implementation of modulation doped devices. Although its natural wavelength was not the one of choice for fiber transmission, all that is changing now with the emergence of quantum-dot growth ideally suited to GaAs epitaxy. POET combines all three of these capabilities in a new integration platform.

The result is that an optoelectronic device using such a technology can achieve estimated cost savings back to the manufacturer of 80 percent compared with the hybrid silicon devices that are widely used today.

IP: Is gallium arsenide a potential replacement for silicon, or more of a complement?

GT: While gallium arsenide would replace traditional silicon as the compound in semiconductor manufacturing on the POET platform, it is compatible with other semiconductor capabilities and manufacturing systems.

This means that such a platform can build upon and extend design, software and fab processes so that semiconductor manufacturers don’t need to change equipment, while simultaneously providing a quantum step forward in efficiency, speed and cost over present technologies.

IP: In your estimation, what related (or unrelated) technologies stand a decent chance of keeping Moore’s Law on track further into the future?

GT: In POET’s estimation, the guideline for technology advancement is now changing from focusing on Moore’s Law toward higher performance derived from the new capabilities of optical devices, optical intrachip interconnections and quantum computing. This shift will become more pronounced into the future.

IP: When Moore’s Law finally does come to an end, do you expect a drastic falloff of innovation, or just a gradual drifting away from the pace that Moore’s Law sets?

GT: There will not be a drastic falloff of innovation simply because the precedent and expectation will be there. We believe platforms like POET will provide a new direction for the development of optical and quantum technologies. In our opinion, this will be the basis for the next generation of chipsets to continue the advancement of computing performance and efficiency for another 50 years. The new integration platform will both enable and provide the direction for this next wave of innovation.

About Jeff Clark

Jeff Clark is editor for the Data Center Journal. He holds a bachelor’s degree in physics from the University of Richmond, as well as master’s and doctorate degrees in electrical engineering from Virginia Tech. An author and aspiring renaissance man, his interests range from quantum mechanics and processor technology to drawing and philosophy.


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